vendor: Update vendor dir from a80c0fda
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vendor/github.com/minio/sha256-simd/README.md
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# sha256-simd
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Accelerate SHA256 computations in pure Go using AVX512 and AVX2 for Intel and ARM64 for ARM. On AVX512 it provides an up to 8x improvement (over 3 GB/s per core) in comparison to AVX2.
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Accelerate SHA256 computations in pure Go using AVX512, SHA Extensions and AVX2 for Intel and ARM64 for ARM. On AVX512 it provides an up to 8x improvement (over 3 GB/s per core) in comparison to AVX2. SHA Extensions give a performance boost of close to 4x over AVX2.
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## Introduction
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This package uses Golang assembly. The AVX512 version is based on the Intel's "multi-buffer crypto library for IPSec" whereas the other Intel implementations are described in "Fast SHA-256 Implementations on Intel Architecture Processors" by J. Guilford et al.
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## New: Support for AVX512
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## New: Support for Intel SHA Extensions
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Support for the Intel SHA Extensions has been added by Kristofer Peterson (@svenski123), originally developed for spacemeshos [here](https://github.com/spacemeshos/POET/issues/23). On CPUs that support it (known thus far Intel Celeron J3455 and AMD Ryzen) it gives a significant boost in performance (with thanks to @AudriusButkevicius for reporting the results; full results [here](https://github.com/minio/sha256-simd/pull/37#issuecomment-451607827)).
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```
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$ benchcmp avx2.txt sha-ext.txt
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benchmark AVX2 MB/s SHA Ext MB/s speedup
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BenchmarkHash5M 514.40 1975.17 3.84x
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```
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Thanks to Kristofer Peterson, we also added additional performance changes such as optimized padding, endian conversions which sped up all implementations i.e. Intel SHA alone while doubled performance for small sizes, the other changes increased everything roughly 50%.
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## Support for AVX512
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We have added support for AVX512 which results in an up to 8x performance improvement over AVX2 (3.0 GHz Xeon Platinum 8124M CPU):
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| Processor | SIMD | Speed (MB/s) |
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| --------------------------------- | ------- | ------------:|
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| 3.0 GHz Intel Xeon Platinum 8124M | AVX512 | 3498 |
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| 3.7 GHz AMD Ryzen 7 2700X | SHA Ext | 1979 |
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| 1.2 GHz ARM Cortex-A53 | ARM64 | 638 |
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| 3.0 GHz Intel Xeon Platinum 8124M | AVX2 | 449 |
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| 3.1 GHz Intel Core i7 | AVX | 362 |
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## ARM SHA Extensions
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The 64-bit ARMv8 core has introduced new instructions for SHA1 and SHA2 acceleration as part of the [Cryptography Extensions](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0501f/CHDFJBCJ.html). Below you can see a small excerpt highlighting one of the rounds as is done for the SHA256 calculation process (for full code see [sha256block_arm64.s](https://github.com/minio/sha256-simd/blob/master/sha256block_arm64.s)).
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```
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sha256h q2, q3, v9.4s
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sha256h2 q3, q4, v9.4s
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### Detailed benchmarks
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Benchmarks generated on a 1.2 Ghz Quad-Core ARM Cortex A53 equipped [Pine64](https://www.pine64.com/).
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Benchmarks generated on a 1.2 Ghz Quad-Core ARM Cortex A53 equipped [Pine64](https://www.pine64.com/).
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```
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minio@minio-arm:$ benchcmp golang.txt arm64.txt
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