vendor: Mega update all dependencies
GitHub-Pull-Request: https://github.com/syncthing/syncthing/pull/4080
This commit is contained in:
Jakob Borg
321
vendor/github.com/remyoudompheng/bigfft/arith_arm.s
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vendored
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321
vendor/github.com/remyoudompheng/bigfft/arith_arm.s
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// Copyright 2009 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// This file provides fast assembly versions for the elementary
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// arithmetic operations on vectors implemented in arith.go.
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#define CFLAG 29 // bit position of carry flag
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// func addVV(z, x, y []Word) (c Word)
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TEXT ·addVV(SB),7,$0
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MOVW $0, R0
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MOVW z+0(FP), R1
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MOVW x+12(FP), R2
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MOVW y+24(FP), R3
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MOVW n+4(FP), R4
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MOVW R4<<2, R4
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ADD R1, R4
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B E1
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L1:
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MOVW.P 4(R2), R5
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MOVW.P 4(R3), R6
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MOVW R0, CPSR
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ADC.S R6, R5
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MOVW.P R5, 4(R1)
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MOVW CPSR, R0
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E1:
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CMP R1, R4
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BNE L1
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MOVW R0>>CFLAG, R0
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AND $1, R0
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MOVW R0, c+36(FP)
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RET
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// func subVV(z, x, y []Word) (c Word)
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// (same as addVV except for SBC instead of ADC and label names)
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TEXT ·subVV(SB),7,$0
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MOVW $(1<<CFLAG), R0
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MOVW z+0(FP), R1
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MOVW x+12(FP), R2
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MOVW y+24(FP), R3
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MOVW n+4(FP), R4
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MOVW R4<<2, R4
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ADD R1, R4
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B E2
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L2:
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MOVW.P 4(R2), R5
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MOVW.P 4(R3), R6
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MOVW R0, CPSR
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SBC.S R6, R5
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MOVW.P R5, 4(R1)
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MOVW CPSR, R0
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E2:
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CMP R1, R4
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BNE L2
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MOVW R0>>CFLAG, R0
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AND $1, R0
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EOR $1, R0
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MOVW R0, c+36(FP)
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RET
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// func addVW(z, x []Word, y Word) (c Word)
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TEXT ·addVW(SB),7,$0
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MOVW z+0(FP), R1
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MOVW x+12(FP), R2
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MOVW y+24(FP), R3
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MOVW n+4(FP), R4
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MOVW R4<<2, R4
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ADD R1, R4
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CMP R1, R4
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BNE L3a
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MOVW R3, c+28(FP)
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RET
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L3a:
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MOVW.P 4(R2), R5
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ADD.S R3, R5
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MOVW.P R5, 4(R1)
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MOVW CPSR, R0
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B E3
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L3:
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MOVW.P 4(R2), R5
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MOVW R0, CPSR
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ADC.S $0, R5
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MOVW.P R5, 4(R1)
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MOVW CPSR, R0
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E3:
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CMP R1, R4
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BNE L3
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MOVW R0>>CFLAG, R0
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AND $1, R0
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MOVW R0, c+28(FP)
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RET
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// func subVW(z, x []Word, y Word) (c Word)
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TEXT ·subVW(SB),7,$0
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MOVW z+0(FP), R1
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MOVW x+12(FP), R2
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MOVW y+24(FP), R3
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MOVW n+4(FP), R4
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MOVW R4<<2, R4
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ADD R1, R4
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CMP R1, R4
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BNE L4a
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MOVW R3, c+28(FP)
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RET
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L4a:
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MOVW.P 4(R2), R5
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SUB.S R3, R5
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MOVW.P R5, 4(R1)
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MOVW CPSR, R0
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B E4
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L4:
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MOVW.P 4(R2), R5
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MOVW R0, CPSR
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SBC.S $0, R5
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MOVW.P R5, 4(R1)
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MOVW CPSR, R0
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E4:
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CMP R1, R4
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BNE L4
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MOVW R0>>CFLAG, R0
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AND $1, R0
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EOR $1, R0
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MOVW R0, c+28(FP)
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RET
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// func shlVU(z, x []Word, s uint) (c Word)
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TEXT ·shlVU(SB),7,$0
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MOVW n+4(FP), R5
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CMP $0, R5
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BEQ X7
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MOVW z+0(FP), R1
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MOVW x+12(FP), R2
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MOVW R5<<2, R5
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ADD R5, R2
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ADD R1, R5
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MOVW s+24(FP), R3
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CMP $0, R3 // shift 0 is special
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BEQ Y7
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ADD $4, R1 // stop one word early
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MOVW $32, R4
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SUB R3, R4
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MOVW $0, R7
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MOVW.W -4(R2), R6
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MOVW R6<<R3, R7
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MOVW R6>>R4, R6
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MOVW R6, c+28(FP)
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B E7
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L7:
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MOVW.W -4(R2), R6
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ORR R6>>R4, R7
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MOVW.W R7, -4(R5)
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MOVW R6<<R3, R7
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E7:
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CMP R1, R5
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BNE L7
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MOVW R7, -4(R5)
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RET
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Y7: // copy loop, because shift 0 == shift 32
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MOVW.W -4(R2), R6
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MOVW.W R6, -4(R5)
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CMP R1, R5
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BNE Y7
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X7:
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MOVW $0, R1
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MOVW R1, c+28(FP)
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RET
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// func shrVU(z, x []Word, s uint) (c Word)
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TEXT ·shrVU(SB),7,$0
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MOVW n+4(FP), R5
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CMP $0, R5
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BEQ X6
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MOVW z+0(FP), R1
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MOVW x+12(FP), R2
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MOVW R5<<2, R5
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ADD R1, R5
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MOVW s+24(FP), R3
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CMP $0, R3 // shift 0 is special
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BEQ Y6
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SUB $4, R5 // stop one word early
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MOVW $32, R4
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SUB R3, R4
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MOVW $0, R7
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// first word
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MOVW.P 4(R2), R6
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MOVW R6>>R3, R7
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MOVW R6<<R4, R6
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MOVW R6, c+28(FP)
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B E6
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// word loop
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L6:
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MOVW.P 4(R2), R6
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ORR R6<<R4, R7
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MOVW.P R7, 4(R1)
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MOVW R6>>R3, R7
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E6:
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CMP R1, R5
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BNE L6
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MOVW R7, 0(R1)
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RET
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Y6: // copy loop, because shift 0 == shift 32
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MOVW.P 4(R2), R6
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MOVW.P R6, 4(R1)
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CMP R1, R5
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BNE Y6
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X6:
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MOVW $0, R1
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MOVW R1, c+28(FP)
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RET
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// func mulAddVWW(z, x []Word, y, r Word) (c Word)
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TEXT ·mulAddVWW(SB),7,$0
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MOVW $0, R0
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MOVW z+0(FP), R1
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MOVW x+12(FP), R2
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MOVW y+24(FP), R3
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MOVW r+28(FP), R4
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MOVW n+4(FP), R5
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MOVW R5<<2, R5
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ADD R1, R5
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B E8
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// word loop
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L8:
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MOVW.P 4(R2), R6
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MULLU R6, R3, (R7, R6)
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ADD.S R4, R6
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ADC R0, R7
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MOVW.P R6, 4(R1)
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MOVW R7, R4
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E8:
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CMP R1, R5
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BNE L8
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MOVW R4, c+32(FP)
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RET
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// func addMulVVW(z, x []Word, y Word) (c Word)
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TEXT ·addMulVVW(SB),7,$0
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MOVW $0, R0
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MOVW z+0(FP), R1
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MOVW x+12(FP), R2
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MOVW y+24(FP), R3
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MOVW n+4(FP), R5
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MOVW R5<<2, R5
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ADD R1, R5
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MOVW $0, R4
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B E9
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// word loop
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L9:
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MOVW.P 4(R2), R6
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MULLU R6, R3, (R7, R6)
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ADD.S R4, R6
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ADC R0, R7
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MOVW 0(R1), R4
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ADD.S R4, R6
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ADC R0, R7
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MOVW.P R6, 4(R1)
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MOVW R7, R4
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E9:
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CMP R1, R5
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BNE L9
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MOVW R4, c+28(FP)
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RET
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// func divWVW(z* Word, xn Word, x []Word, y Word) (r Word)
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TEXT ·divWVW(SB),7,$0
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// ARM has no multiword division, so use portable code.
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B ·divWVW_g(SB)
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// func divWW(x1, x0, y Word) (q, r Word)
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TEXT ·divWW(SB),7,$0
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// ARM has no multiword division, so use portable code.
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B ·divWW_g(SB)
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// func mulWW(x, y Word) (z1, z0 Word)
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TEXT ·mulWW(SB),7,$0
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MOVW x+0(FP), R1
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MOVW y+4(FP), R2
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MULLU R1, R2, (R4, R3)
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MOVW R4, z1+8(FP)
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MOVW R3, z0+12(FP)
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RET
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// func bitLen(x Word) (n int)
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TEXT ·bitLen(SB),7,$0
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MOVW x+0(FP), R0
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CLZ R0, R0
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MOVW $32, R1
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SUB.S R0, R1
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MOVW R1, n+4(FP)
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RET
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